Upgrade 2021: phi LAB Speakers

September 20, 2021 // Upgrade 2021: PHI LAB Speakers

CIM on Chip Demonstration

Satoshi Kako, NTT Research Physics & Informatics (PHI) Lab Senior Research Scientist

Summary

Demo Shows Promise of Coherent Icing Machine Approach to Computing for Complex Problems

Today’s computers are facing a problem: they can’t keep up with the sorts of problems scientists are trying to solve, such as drug development calculations that involve thousands or millions of variables. NTT Research is proposing a solution with a new approach to computing called Coherent Icing Machine (CIM), which lives at the crossroads of physics, neuroscience and computer science.

At Upgrade 2021, Dr. Satoshi Kako, a Senior Research Scientist at NTT Research, demonstrated the capabilities of a CIM implementation on a single FPGA chip. It proved capable of solving a problem involving 1,000 variables at a speed 10 times faster than existing solutions.

His demonstration worked on a complex problem similar to the traveling salesman problem, where a salesman has to calculate the most efficient path among five cities. With such a limited number, it’s possible to manually calculate the most efficient route. Increase the number to 16 cities, and now you have 65,000 calculations. “We can do that, but it takes a long time,” Dr. Kako said. At 30 cities, it’s an almost astronomical number. “And at 60, the total number of combination of routes, become [equal to] the total number of atoms in the universe,” he said.

At that point, working out the calculation requires some sort of clever trick, which researchers have been working on for some time. The NTT Research approach involves converting these combinatorial optimizations using the Ising model to find the minimum energy state. “Once we have the smart way to solve this Ising model, then we can solve every combinatorial optimization problem,” he said.

As a baseline for his demonstration, Dr. Kako ran a simulated annealing, a powerful heuristic algorithm, on an Intel i9 16-core processor. The demo involved a problem with five instances and 100 trials in each instance. In the end the model found a solution for only one of the five instances and took about 10 seconds for each of the 100 trials.

The CIM on a chip trial involved the same five instances, but with 1,000 trials each, or 10 times the baseline test. In about one second, the simulation found a solution for every instance, vs. one-in-five for the Intel-based test.

“If you look at the computation time, it’s 10 times faster compared with the simulated annealing, even for 10 times more trials,” Dr. Kako said. “That means we have 100 times more speed.”

The goal is to deal with far more complex problems, with 10,000 to 100,000 variables or more. “And we actually are in development in this direction,” he said. “This demonstration is just a first step toward that future progress.”

Click below for the full transcript.

Satoshi Kako

NTT Research Physics & Informatics (PHI) Lab Senior Research Scientist