At SPIE Optics + Photonics, a large multidisciplinary optical sciences and technology event held in San Diego, August 18-22, 2024, scientists from the NTT Research Physics & Informatics (PHI) Lab were key contributors to two invited papers on programmable photonics. In particular, on research related to overcoming limits to the scalability of programmable photonic circuits, and to achieving greater scale for on-chip photonic processors for neural networks.
Drawing upon this paper on programmable photonic circuits, PHI Lab Senior Scientist and lead author Ryan Hamerly delivered a talk at SPIE titled, “More with Less: Fault-tolerance and information-theoretic optimality in programmable photonics.” While the idea of programmability is primarily associated with computers, modern manufacturing processes, especially those involving silicon photonics, have made programmable photonics a new reality. The problem is that photonic components are neither small nor cheap, which raises this question: What is the optimal photonic circuit for a given task?
Dr. Hamerly addressed this optimization problem by looking at the specific example of a multiport interferometer, an optical component used to split and manipulate light beams. Among the various factors that make such a device optimal, in this talk he focused on two: error robustness and the efficient use of phase shift. To the first point, he said adding a third splitter to each Mach-Zehnder interferometer (i.e., making a 3-MZI) facilitates error correction. The second point regarding phase shifters, which enables interferometers to manipulate the phase of light waves, received more attention.
Because changes in optical variables are so negligible, phases can be seen as expensive. In general, it is hard to make phase shifters that are simultaneously low-loss, compact, low-power, fully tunable and fast. The fully tunable (2-pi) tuning range is notably limiting. By extensively studying the phase-shifter economy in photonic architectures, however, Dr. Hamerly and his colleagues from MIT and the University of Maryland found that the use of 3-MZI in mesh-based unitary photonic circuits enables one to closely approach an information theory-derived lower bound on moments of total phase shift. In other words, an approximately 10x reduction in average phase shift over the status quo. Demonstrated on non-unitary circuits for optical neural network training, this phase-efficient 3-MZI circuit architecture performed with high accuracy down to 0.1 radians.
The second SPIE presentation on scaling photonic processors drew from a paper co-authored by members of the PHI Lab, Cornell University and Stanford University. Titled “Scaling on-chip photonic neural processors using arbitrarily programmable wave propagation,” the paper proposed using a 2D-programmable waveguide as a way to boost speed and energy efficiency and thereby achieve the scale needed to compete with electronic processors. Whereas the dominant paradigm is to build integrated-photonic processors using relatively bulky discrete components connected by single-mode waveguides, the authors of this paper argue that a far more compact alternative is to avoid explicitly defining any components. Their alternative recommendation: Sculpt the continuous substrate of the photonic processor to directly perform the computation using waves freely propagating in two dimensions.
In this SPIE talk, Yale University Assistant Professor Logan Wright presented the group’s work on realizing this more efficient approach. (When the paper was written, Wright was with Cornell and the PHI Lab; he delivered the presentation in place of lead author PHI Lab Scientist Tatsuhiro Onodera, also affiliated with Cornell, who could not make the conference in time due to a cancelled flight.) The key is a lithium niobate slab waveguide, a device that combines photoconductive gain with the electro-optic effect and whose refractive index as a function of space can be rapidly reprogrammed.
Experimentally, the research team used the device to perform neural-network inference with up to 49-dimensional input vectors in a single pass. In principle, with a chip area of sufficient size, the re-programmability of the device’s refractive index distribution enables the reconfigurable realization of any passive, linear photonic circuit or device. More compact and versatile photonic systems that develop as a result could play out in a range of applications, including optical processing, smart sensing, spectroscopy, and optical communications.